M95256-CS3GSLASHA datasheet(14/48 Pages) STMICROELECTRONICS

14 / 48 page

Instructions

M95256-DR, M95256, M95256-W, M95256-R

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Doc ID 12276 Rev 11

Instructions

Each instruction starts with a single-byte code, as summarized in Table 3.

If an invalid instruction is sent (one not contained in Table 3), the device automatically

deselects itself.

Table 3.

Instruction set

Instruction

Description

Instruction format

WREN

Write Enable

0000 0110

WRDI

Write Disable

0000 0100

RDSR

Read Status Register

0000 0101

WRSR

Write Status Register

0000 0001

READ

Read from Memory Array

0000 0011

WRITE

Write to Memory Array

0000 0010

Table 4.

M95256-R instruction set

Instruction

Description

Instruction

format

WREN

Write Enable

0000 0110

WRDI

Write Disable

0000 0100

RDSR

Read Status Register

0000 0101

WRSR

Write Status Register

0000 0001

READ

Read from Memory Array

0000 0011

WRITE

Write to Memory Array

0000 0010

Read Identification

Page

Reads the page dedicated to identification.

1000 0011(1)

Address bit A10 must be 0, all other address bits are Don't Care.

Write Identification

Page

Writes the page dedicated to identification.

1000 0010(1)

Read Lock Status

Reads the lock status of the Identification Page.

1000 0011(2)

Address bit A10 must be 1, all other address bits are Don't Care.

Lock ID

Locks the Identification page in read-only mode.

1000 0010(2)

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