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L9950XP bảng dữ liệu(PDF) 28 Page - STMicroelectronics

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L9950XP bảng dữ liệu(HTML) 28 Page - STMicroelectronics

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Functional description of the SPI
L9950 - L9950XP
28/39
Doc ID 10311 Rev 10
17
OUT11 – HS
on/off
If a bit is set the selected
output driver is switched
on. If the corresponding
PWM enable bit is set
(Input Register 1) the
driver is only activated if
PWM1 (PWM2) input
signal is high. The outputs
of OUT1-OUT6 are half
bridges. If the bits of HS-
and LS driver of the same
half bridge are set, the
internal logic prevents that
both drivers of this output
stage can be switched on
simultaneously in order to
avoid a high internal
current from VS to GND.
In test mode (CSN>7.5 V)
this bit combinations are
used to multiplex internal
signals to the DO output.
OUT11 – HS
over-current
In case of an over-current
event the corresponding
status bit is set and the output
driver is disabled. If the over-
current Recovery Enable bit is
set (Input Register 1) the
output will be automatically
reactivated after a delay time
resulting in a PWM modulated
current with a programmable
duty cycle (Bit 21).
If the over-current recovery bit
is not set the microcontroller
has to clear the over-current
bit (Reset Bit) to reactivate the
output driver.
16
OUT10 – HS
on/off
OUT10 – HS
over-current
15
OUT9 – HS
on/off
OUT9 – HS
over-current
14
OUT8 – HS
on/off
OUT8 – HS
over-current
13
OUT7 – HS
on/off
OUT7 – HS
over-current
12
OUT6 – HS
on/off
OUT6 – HS
over-current
11
OUT6 – LS
on/off
OUT6 – LS
over-current
10
OUT5 – HS
on/off
OUT5 – HS
over-current
9
OUT5 – LS
on/off
OUT5 – LS
over-current
8
OUT4 – HS
on/off
OUT4 – HS
over-current
7
OUT4 – LS
on/off
OUT4 – LS
over-current
6
OUT3 – HS
on/off
OUT3 – HS
over-current
5
OUT3 – LS
on/off
OUT3 – LS
over-current
4
OUT2 – HS
on/off
OUT2 – HS
over-current
3
OUT2 – LS
on/off
OUT2 – LS
over-current
2
OUT1 – HS
on/off
OUT1 – HS
over-current
1
OUT1 – LS
on/off
OUT1 – LS
over-current
0
0
No error bit
A logical NOR combination of
all bits 1 to 22 in both status
registers.
Table 19.
SPI - input data and status registers 0 (continued)
Bit
Input register 0 (write)
Status register 0 (read)
Name
Comment
Name
Comment



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