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450 bảng dữ liệu(PDF) 34 Page - Intel Corporation |
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450 bảng dữ liệu(HTML) 34 Page - Intel Corporation |
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34 / 100 page ![]() Electrical Specifications 34 Datasheet 2.9 PECI DC Specifications PECI is an Intel proprietary one-wire interface that provides a communication channel between Intel processors (may also include chipset components in the future) and external thermal monitoring devices. The processor contains Digital Thermal Sensors (DTS) distributed throughout die. These sensors are implemented as analog-to-digital converters calibrated at the factory for reasonable accuracy to provide a digital representation of relative processor temperature. PECI provides an interface to relay the highest DTS temperature within a die to external management devices for thermal/ fan speed control. More detailed information is available in the Platform Environment Control Interface (PECI) Specification. NOTE: 1. VTT supplies the PECI interface. PECI behavior does not affect VTT min/max specifications. 2. The leakage specification applies to powered devices on the PECI bus. 3. The input buffers use a Schmitt-triggered input design for improved noise immunity. 4. One node is counted for each client and one node for the system host. Extended trace lengths might appear as additional nodes. § Table 19. PECI DC Electrical Limits Symbol Definition and Conditions Min Max Units Notes Vin Input Voltage Range -0.15 VTT+ 0.15 V Vhysteresis Hysteresis 0.1 * VTT —V 3 Vn Negative-edge threshold voltage 0.275 * VTT 0.500 * VTT V Vp Positive-edge threshold voltage 0.550 * VTT 0.725 * VTT V Isource High level output source (VOH = 0.75 * VTT) -6.0 N/A mA Isink Low level output sink (VOL = 0.25 * VTT) 0.5 1.0 mA Ileak+ High impedance state leakage to VTT N/A 50 µA 2 Ileak- High impedance leakage to GND N/A 10 µA 2 Cbus Bus capacitance per node —10 pF 4 Vnoise Signal noise immunity above 300 MHz 0.1 * VTT —Vp-p |
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