ST62T85B datasheet(56/78 Pages) STMICROELECTRONICS

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ST62T85B/E85B

LCD CONTROLLER-DRIVER (Cont”d)

4.7.1 Multiplexing ratio and frame frequency

setting

Up to 16 common plates COM1..COM16 can be

used for multiplexing ratio of 1/8, 1/11 and 1/16.

The selection is made by the bits MUX11 and

MUX16 of the LCDCR as shown in the Table 21.

Table 21. Multiplexing ratio

If the 1/1 multiplexing ratio is chosen, LCD seg-

ments are refreshed with a frame frequency Flcd

derived from 32Khz clock with a division ratio de-

fined by the bits LF0..LF2 of the LCDCR.

When a higher multiplexing ratio is set, refreshment

frequency is decreased accordingly (Table 22).

Table 22. LCD Frame Frequency Selection

4.7.2 Segment and common plates driving

LCD panels physical structure requires precise

timings and stepped voltage values on common

and segment outputs. Timings are managed by

the LCD controller, while voltages are generated

through an external resistive bridge. In 1/11 and

1/8 multiplexing mode, VLCD 2/5 and VLDCD 3/5

are shorted as seen on Figure 30.

Figure 30. Bias Config for 1/2 Duty

Note: For display voltages VLCD < 4.5V the resis-

tivity of the divider may be too high for some appli-

cations (especially using 1/3 or 1/4 duty display

mode). In that case an external resistive divider

must be used to achieve the desired resistivity.

MUX11 MUX16

Display Mode

Active backplanes

1/8 mux.ratio

COM1-8

1/11 mux.ratio

COM1-16

1/16 mux.ratio

COM1-16

Reserved

LF1

LF0

Base

fLCD

(Hz)

Frame Frequency fF (Hz)

1/8

mux.ratio

1/11

mux.ratio

1/16

mux.ratio

128

170

124

256

186

128

512

372

256

Reserved

VLCD

VLCD 4/5

VLCD 3/5

VLCD 2/5

VLCD 1/5

GND

VLCD

1/4 bias

(1/11, 1/8 MUX)

R2 to R5 should be 1K

Ω to 200KΩ

C1 to C5 should be 0µF to 0.3 µF

VR001662

VLCD 4/5

VLCD 3/5

VLCD 2/5

VLCD 1/5

(1/16 MUX)

1/5 bias

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