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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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MB90F482BPMC bảng dữ liệu(PDF) 75 Page - fujitsu semiconductor |
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MB90F482BPMC bảng dữ liệu(HTML) 75 Page - fujitsu semiconductor |
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75 / 124 page  MB90480B/485B Series DS07-13722-11E 75 19. Chip Select Function Description The chip select module generates a chip select signals, which are used to facilitate connections to external memory devices. The MB90480B/485B series has four chip select output pins, each having a chip select area register setting that specifies the corresponding hardware area and select signal that is output when access to the corresponding external address is detected. • Chip select function features The chip select function uses two 8-bit registers for each output pin. One of these registers (CARx) is able to detect memory areas in 64 Kbytes units by specifying the upper 8-bit of the address for match detection. The other register (CMRx) can be used to expand the detection area beyond 64 Kbytes by masking bits for match detection. Note that during external bus holds, the CS output is set to high impedance. (1) Register List Chip select area mask registers (CMRx) Chip select area registers (CARx) Chip select control register (CSCR) Chip select active level register (CALR) 0000C0H 0000C2H 0000C4H 0000C6H Read/write Initial value 0000C1H 0000C3H 0000C5H 0000C7H Read/write Initial value 0000C8H Read/write Initial value 0000C9H Read/write Initial value CMR1 CMR0 CAR0 R/W R/W CAR1 15 0 CMR3 CMR2 CAR2 R/W R/W CAR3 CSCR R/W CALR 87 R/W 0 R/W 0 R/W 0 R/W 1 R/W 1 R/W 1 R/W 1 76 5 4 3 2 1 0 M6 R/W 0 M7 M5 M4 M3 M2 M1 M0 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 15 14 13 12 11 10 9 8 A6 R/W 1 A7 A5 A4 A3 A2 A1 A0 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ R/W 0 R/W 0 R/W 0 R/W * 76 5 4 3 2 1 0 ⎯ ⎯ ⎯ ⎯⎯ ⎯ OPL3 OPL2 OPL1 OPL0 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ R/W 0 R/W 0 R/W 0 R/W 0 15 14 13 12 11 10 9 8 ⎯ ⎯ ⎯ ⎯⎯ ⎯ ACTL3 ACTL2 ACTL1 ACTL0 * : The initial value of this bit is “1” or “0”. The value depends on the mode pin (MD2, MD1 and MD0) . |
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