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ISL78840ASRHF/PROTO bảng dữ liệu(PDF) 9 Page - Intersil Corporation |
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ISL78840ASRHF/PROTO bảng dữ liệu(HTML) 9 Page - Intersil Corporation |
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9 / 11 page ![]() 9 FN6991.0 December 21, 2009 RCS = 295mΩ Determine the amount of voltage, Ve, that must be added to the current feedback signal using Equation 12. Ve = 92.4mV Using Equation 17, solve for the summing resistor, R9, from CT to CS. R9 = 2.67kΩ Determine the new value of RCS (R’CS) using Equation 18. R’CS = 350mΩ Additional slope compensation may be considered for design margin. The above discussion determines the minimum external ramp that is required. The buffer transistor used to create the external ramp from RTCT should have a sufficiently high gain (>200) so as to minimize the required base current. Whatever base current is required reduces the charging current into RTCT and will reduce the oscillator frequency. Fault Conditions A Fault condition occurs if VREF falls below 4.65V. When a Fault is detected OUT is disabled. When VREF exceeds 4.80V, the Fault condition clears, and OUT is enabled. Ground Plane Requirements Careful layout is essential for satisfactory operation of the device. A good ground plane must be employed. A unique section of the ground plane must be designated for high di/dt currents associated with the output stage. VDD should be bypassed directly to GND with good high frequency capacitors. References [1] Ridley, R., “A New Continuous-Time Model for Current Mode Control”, IEEE Transactions on Power Electronics, Vol. 6, No. 2, April 1991. ISL78840ASRH, ISL78841ASRH, ISL78843ASRH, ISL78845ASRH |
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