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DS26521 bảng dữ liệu(PDF) 72 Page - Maxim Integrated Products |
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DS26521 bảng dữ liệu(HTML) 72 Page - Maxim Integrated Products |
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72 / 258 page ![]() DS26521 Single T1/E1/J1 Transceiver 72 of 258 Figure 8-19. E1 Transmit Pulse Templates 0 -0.1 -0.2 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 0 TIME (ns) 50 100 150 200 250 -50 -100 -150 -200 -250 269ns 194ns 219ns G.703 Template 8.11.2.2 Transmit Power-Down The individual transmitters can be powered down by setting the TPDE bit in the LIU Maintenance Control register (LMCR). Note that powering down the transmit LIU results in a high-impedance state for the corresponding TTIP and TRING pins. When tansmit all ones (AIS) is invoked, continuous ones are transmitted using MCLK as the timing reference. Data input from the framer is ignored. AIS can be sent by setting a bit in the LMCR. Transmit all ones will also be sent if the corresponding receiver goes into LOS state and the ATAIS bit is set in the LMCR. 8.11.2.3 Transmit Short-Circuit Detector/Limiter Each transmitter has an automatic short-circuit current limiter that activates when the load resistance is approximately 25 Ω or less. SCS (LRSR.2) provides a real-time indication of when the current limiter is activated. The LIU Latched Status register (LLSR) provides latched versions of the information, which can be used to activate an interrupt when enable via the LSIMR register. 8.11.2.4 Transmit Open-Circuit Detector The DS26521 can also detect when the TTIP or TRING outputs are open circuited. OCS (LRSR.1) provides a real- time indication of when an open circuit is detected. Register LLSR provides latched versions of the information, which can be used to activate an interrupt when enabled via the LSIMR register. The open-circuit detect feature is not available in T1 CSU operating modes (LBO5, LBO6, and LBO7). |
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