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PCA2001 bảng dữ liệu(PDF) 12 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  32 kHz watch circuit with programmable adaptive motor pulse
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PCA2001 bảng dữ liệu(HTML) 12 Page - NXP Semiconductors

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PCA2000_2001
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 08 — 23 August 2010
12 of 30
NXP Semiconductors
PCA2000; PCA2001
32 kHz watch circuit with programmable adaptive motor pulse
2. Enter the data to be stored in the shift register (td =t2 or t3). LSB first (bit 8) and the
MSB last (bit 1).
3. Applying the two-stage programming pulse Vprestore followed by Vstore stores the word.
The delay between the last data bit and the prestore pulse Vprestore is td =t4. Store the
word by raising the supply voltage to Vstore; the delay between the last data bit and the
store pulse is td.
The example shown in Figure 7 performs the following functions:
• Start
• Setting instruction counter to state 4 (word B)
• Entering data word 110101 into the shift register (sequence: LSB first and MSB last)
• Writing to the OTP cells for word B
The example shows the programming of B = 110101 (the sequence is LSB first and MSB last).
Fig 7.
Supply voltage modulation for programming
mgw356
VDD(nom)
VP(mod)
VDD
VSS
VP(prog)(start)
tp(start)
t0
t1 t1 t1
t3
t2
t3
t2
t3
t3
t4
tw(store)
Vstore
Vprestore
tw(prestore)



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