LM4951ASD datasheet(13/20 Pages) NSC

13 / 20 page

Application Information

BRIDGE CONFIGURATION EXPLANATION

As shown in Figure 1, the LM4951A consists of two opera-

tional amplifiers that drive a speaker connected between their

outputs. The value of input and feedback resistors determine

the gain of each amplifier. External resistors R

i and Rf set the

closed-loop gain of AMP

A, whereas two 20kΩ internal resis-

tors set AMP

B's gain to -1. Figure 1 shows that AMPA's output

serves as AMP

B's input. This results in both amplifiers pro-

ducing signals identical in magnitude, but 180° out of phase.

Taking advantage of this phase difference, a load is placed

between AMP

A and AMPB and driven differentially (commonly

referred to as "bridge-tied load"). This results in a differential,

or BTL, gain of:

VD = 2(Rf / Ri)

(V/V)

(1)

Bridge mode amplifiers are different from single-ended am-

plifiers that drive loads connected between a single amplifier's

output and ground. For a given supply voltage, bridge mode

has an advantage over the single-ended configuration: its dif-

ferential output doubles the voltage swing across the load.

Theoretically, this produces four times the output power when

compared to a single-ended amplifier under the same condi-

tions. This increase in attainable output power assumes that

the amplifier is not current limited and that the output signal

is not clipped. Under rare conditions, with unique combina-

tions of high power supply voltage and high closed loop gain

settings, the LM4951A may exhibit low frequency oscillations.

Another advantage of the differential bridge output is no net

DC voltage across the load. This is accomplished by biasing

AMP1's and AMP2's outputs at half-supply. This eliminates

the coupling capacitor that single supply, single-ended am-

plifiers require. Eliminating an output coupling capacitor in a

typical single-ended configuration forces a single-supply

amplifier's half-supply bias voltage across the load. This in-

creases internal IC power dissipation and may permanently

damage loads such as speakers.

POWER DISSIPATION

The LM4951A's dissipation when driving a BTL load is given

by Equation (2). For a 7.5V supply and a single 8

Ω BTL load,

the dissipation is 1.42W.

DMAX-MONOBTL = 4(VDD)

2 / 2

π2R

(W)

(2)

The maximum power dissipation point given by Equation (2)

must not exceed the power dissipation given by Equation (3):

DMAX = (TJMAX - TA) / θJA

(3)

The LM4951A's T

JMAX = 150°C. In the SD package, the

LM4951A's

JA is 73°C/W when the metal tab is soldered to

a copper plane of at least 1in2. This plane can be split between

the top and bottom layers of a two-sided PCB. Connect the

two layers together under the tab with an array of vias. At any

given ambient temperature T

A, use Equation (3) to find the

maximum internal power dissipation supported by the IC

packaging. Rearranging Equation (3) and substituting

DMAX for PDMAX' results in Equation (4). This equation gives

the maximum ambient temperature that still allows maximum

stereo power dissipation without violating the LM4951A's

maximum junction temperature.

A = TJMAX - PDMAX-MONOBTLθJA

(°C)

(4)

For a typical application with a 7.5V power supply and a BTL

Ω load, the maximum ambient temperature that allows max-

imum stereo power dissipation without exceeding the maxi-

mum junction temperature is 46°C for the SD package.

JMAX = PDMAX-MONOBTLθJA + TA

(°C)

(5)

Equation (5) gives the maximum junction temperature

JMAX. If the result violates the LM4951A's maximum junction

temperature of 150°C, reduce the maximum junction temper-

ature by reducing the power supply voltage or increasing the

load resistance. Further allowance should be made for in-

creased ambient temperatures.

The above examples assume that a device is operating

around the maximum power dissipation point. Since internal

power dissipation is a function of output power, higher ambi-

ent temperatures are allowed as output power or duty cycle

decreases.

If the result of Equation (2) is greater than that of Equation (3),

then decrease the supply voltage, increase the load

impedance, or reduce the ambient temperature. Further, en-

sure that speakers rated at a nominal 8

Ω do not fall below

Ω. If these measures are insufficient, a heat sink can be

added to reduce

JA. The heat sink can be created using ad-

ditional copper area around the package, with connections to

the ground pins, supply pin and amplifier output pins. Refer

to the Typical Performance Characteristics curves for pow-

er dissipation information at lower output power levels.

POWER SUPPLY BYPASSING

As with any power amplifier, proper supply bypassing is crit-

ical for low noise performance and high power supply rejec-

tion. Applications that employ a voltage regulator typically use

a 10µF in parallel with a 0.1µF filter capacitors to stabilize the

regulator's output, reduce noise on the supply line, and im-

prove the supply's transient response. However, their pres-

ence does not eliminate the need for a local 1.0µF tantalum

bypass capacitance connected between the LM4951A's sup-

ply pins and ground. Do not substitute a ceramic capacitor for

the tantalum. Doing so may cause oscillation. Keep the length

of leads and traces that connect capacitors between the

LM4951A's power supply pin and ground as short as possible.

Connecting a larger capacitor, C

BYPASS, between the BY-

PASS pin and ground improves the internal bias voltage's

stability and improves the amplifier's PSRR. The PSRR im-

provements increase as the bypass pin capacitor value in-

creases. Too large, however, increases turn-on time and can

compromise the amplifier's click and pop performance. The

selection of bypass capacitor values, especially C

BYPASS, de-

pends on desired PSRR requirements, click and pop perfor-

mance, system cost, and size constraints.

MICRO-POWER SHUTDOWN

The LM4951A features an active-low micro-power shutdown

mode. When active, the LM4951A's micro-power shutdown

feature turns off the amplifier's bias circuitry, reducing the

supply current. The low 0.01µA typical shutdown current is

achieved by applying a voltage to the SHUTDOWN pin that

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