Sensors

4

Freescale Semiconductor

MMA8451Q

6.4

Motion and Freefall Embedded Function Registers .................................................................................................. 32

Mode 1: Freefall Detection with ELE = 0, OAE = 0 ...................................................................................................... 32

Mode 2: Freefall Detection with ELE = 1, OAE = 0 ...................................................................................................... 32

Mode 3: Motion Detection with ELE = 0, OAE = 1 ....................................................................................................... 32

Mode 4: Motion Detection with ELE = 1, OAE = 1 ....................................................................................................... 32

0x15 FF_MT_CFG Freefall/Motion Configuration Register ........................................................................................ 33

0x15 FF_MT_CFG Register (Read/Write) .......................................................................................................... 33

Table 33. FF_MT_CFG Description ......................................................................................................................... 33

Figure 13. FF_MT_CFG High and Low g Level ........................................................................................................ 33

0x16 FF_MT_SRC Freefall/Motion Source Register ................................................................................................... 33

0x16: FF_MT_SRC Freefall and Motion Source Register (Read Only) .............................................................. 33

Table 34. Freefall/Motion Source Description .......................................................................................................... 34

0x17: FF_MT_THS Freefall and Motion Threshold Register ....................................................................................... 34

0x17 FF_MT_THS Register (Read/Write) ........................................................................................................... 34

Table 35. FF_MT_THS Description .......................................................................................................................... 34

0x18 FF_MT_COUNT Debounce Register ................................................................................................................. 35

0x18 FF_MT_COUNT_Register (Read/Write) .................................................................................................... 35

Table 36. FF_MT_COUNT Description ..................................................................................................................... 35

Table 37. FF_MT_COUNT Relationship with the ODR ............................................................................................ 35

Figure 14. DBCNTM Bit Function ............................................................................................................................. 36

6.5

Transient (HPF) Acceleration Detection ................................................................................................................... 37

0x1D: Transient_CFG Register ................................................................................................................................... 37

0x1D TRANSIENT_ CFG Register (Read/Write) ................................................................................................ 37

Table 38. TRANSIENT_ CFG Description ................................................................................................................ 37

0x1E TRANSIENT_SRC Register ............................................................................................................................... 37

0x1E TRANSIENT_SRC Register (Read Only) .................................................................................................. 37

Table 39. TRANSIENT_SRC Description ................................................................................................................. 37

0x1F TRANSIENT_THS Register ................................................................................................................................ 38

0x1F TRANSIENT_THS Register (Read/Write) .................................................................................................. 38

Table 40. TRANSIENT_THS Description ................................................................................................................. 38

0x20 TRANSIENT_COUNT ......................................................................................................................................... 38

0x20 TRANSIENT_COUNT Register (Read/Write) ............................................................................................ 38

Table 41. TRANSIENT_COUNT Description ............................................................................................................ 38

Table 42. TRANSIENT_COUNT Relationship with the ODR .................................................................................... 38

6.6

Single, Double and Directional Tap Detection Registers .......................................................................................... 39

0x21: PULSE_CFG Pulse Configuration Register ....................................................................................................... 39

0x21 PULSE_CFG Register (Read/Write) .......................................................................................................... 39

Table 43. PULSE_CFG Description .......................................................................................................................... 39

0x22: PULSE_SRC Pulse Source Register ................................................................................................................. 39

0x22 PULSE_SRC Register (Read Only) ........................................................................................................... 39

Table 44. PULSE_SRC Description .......................................................................................................................... 39

0x23 - 0x25: PULSE_THSX, Y, Z Pulse Threshold for X, Y & Z Registers ................................................................. 40

0x23 PULSE_THSX Register (Read/Write) ........................................................................................................ 40

Table 45. PULSE_THSX Description ........................................................................................................................ 40

0x24 PULSE_THSY Register (Read/Write) ........................................................................................................ 40

Table 46. PULSE_THSY Description ........................................................................................................................ 40

0x25 PULSE_THSZ Register (Read/Write) ........................................................................................................ 40

Table 47. PULSE_THSZ Description ........................................................................................................................ 40

0x26: PULSE_TMLT Pulse Time Window 1 Register .................................................................................................. 40

0x26 PULSE_TMLT Register (Read/Write) ........................................................................................................ 40

Table 48. PULSE_TMLT Description ........................................................................................................................ 40

Table 49. Time Step for PULSE Time Limit (Reg 0x0F) Pulse_ LPF_EN = 1 .......................................................... 40

Table 50. Time Step for PULSE Time Limit (Reg 0x0F) Pulse_LPF_EN = 0 ........................................................... 41

0x27: PULSE_LTCY Pulse Latency Timer Register .................................................................................................... 41

0x27 PULSE_LTCY Register (Read/Write) ......................................................................................................... 41

Table 51. PULSE_LTCY Description ........................................................................................................................ 41

Table 52. Time Step for PULSE Latency @ ODR and Power Mode (Reg 0x0F) Pulse_ LPF_EN = 1 .................... 41

Table 53. Time Step for PULSE Latency @ ODR and Power Mode (Reg 0x0F) Pulse_ LPF_EN = 0 .................... 41

0x28 PULSE_WIND Register (Read/Write) ................................................................................................................. 42

Table 54. PULSE_WIND Description ........................................................................................................................ 42

Table 55. Time Step for PULSE Detection Window @ ODR and Power Mode (Reg 0x0F) Pulse_ LPF_EN = 1 .... 42

Table 56. Time Step for PULSE Detection Window @ ODR and Power Mode (Reg 0x0F) Pulse_ LPF_EN = 0 ..... 42