PIC16F720-ESLASHSS datasheet(40/244 Pages) MICROCHIP

40 / 244 page

PIC16F/LF720/721

DS41430A-page 40

 2010 Microchip Technology Inc.

4.5.1

INTCON REGISTER

The INTCON register is a readable and writable

for TMR0 register overflow, PORTB change and

external RA2/INT pin interrupts.

Note:

Interrupt flag bits are set when an interrupt

condition occurs, regardless of the state of

its corresponding enable bit or the Global

Interrupt Enable bit, GIE of the INTCON

appropriate interrupt flag bits are clear

prior to enabling an interrupt.

INTCON: INTERRUPT CONTROL REGISTER

R/W-0

R/W-x

GIE

PEIE

TMR0IE

INTE

RABIE(1)

TMR0IF(2)

INTF

RABIF

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

GIE: Global Interrupt Enable bit

= Enables all unmasked interrupts

= Disables all interrupts

bit 6

PEIE: Peripheral Interrupt Enable bit

= Enables all unmasked peripheral interrupts

= Disables all peripheral interrupts

bit 5

TMR0IE: Timer0 Overflow Interrupt Enable bit

= Enables the Timer0 interrupt

= Disables the Timer0 interrupt

bit 4

INTE: RA2/INT External Interrupt Enable bit

= Enables the RA2/INT external interrupt

= Disables the RA2/INT external interrupt

bit 3

RABIE: PORTA or PORTB Change Interrupt Enable bit(1)

= Enables the PORTA or PORTB change interrupt

= Disables the PORTA or PORTB change interrupt

bit 2

TMR0IF: Timer0 Overflow Interrupt Flag bit(2)

= TMR0 register has overflowed (must be cleared in software)

= TMR0 register did not overflow

bit 1

INTF: RA2/INT External Interrupt Flag bit

= The RA2/INT external interrupt occurred (must be cleared in software)

= The RA2/INT external interrupt did not occur

bit 0

RABIF: PORTA or PORTB Change Interrupt Flag bit

= When at least one of the PORTA or PORTB general purpose I/O pins changed state (must be

cleared in software)

= None of the PORTA or PORTB general purpose I/O pins have changed state

Note 1:

The appropriate bits in the IOCB register must also be set.

TMR0IF bit is set when Timer0 rolls over. Timer0 is unchanged on Reset and should be initialized before

clearing TMR0IF bit.

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