R5F2M121ANDD datasheet(4/48 Pages) RENESAS

4 / 48 page

R8C/M11A Group, R8C/M12A Group

1. Overview

Under development Preliminary document

Specifications in this document are tentative and subject to change.

R01DS0010EJ0010 Rev.0.10

Page 4 of 45

Aug 25, 2010

1.1.3

Specifications

Tables 1.3 and 1.4 outline the Specifications.

Table 1.3

Specifications (1)

Item

Function

Description

CPU

Central processing

unit

R8C CPU core

• Number of fundamental instructions: 89

• Minimum instruction execution time:

50 ns (f(XIN) = 20 MHz, VCC = 2.7 V to 5.5 V)

200 ns (f(XIN) = 5 MHz, VCC = 1.8 V to 5.5 V)

• Multiplier: 16 bits × 16 bits

→ 32 bits

• Multiply-accumulate instruction: 16 bits × 16 bits + 32 bits

→ 32 bits

• Operating mode: Single-chip mode (address space: 1 Mbyte)

Memory

ROM, RAM,

data flash

See Table 1.5 Product List.

Reset sources

• Hardware reset by RESET

• Power-on reset

• Watchdog timer reset

• Software reset

• Reset by voltage detection 0

Voltage

detection

Voltage detection

circuit

Voltage detection with two check points:

Voltage detection 0, voltage detection 1 (detection levels selectable)

Watchdog timer

• 14 bits × 1 (with prescaler)

• Reset start function selectable

• Count source protection function selectable

Clock

Clock generation

circuits

• 3 circuits: XIN clock oscillation circuit,

high-speed on-chip oscillator (with frequency adjustment function),

low-speed on-chip oscillator

• Oscillation stop detection: XIN clock oscillation stop detection function

• Clock frequency divider circuit integrated

Power control

• Standard operating mode

• Wait mode (CPU stopped, peripheral functions in operation)

• Stop mode (CPU and peripheral functions stopped)

Interrupts

• Number of interrupt vectors: 69

• External interrupt inputs: 8 (INT × 4, key input × 4)

• Priority levels: 2

I/O ports

Programmable I/O

ports

• CMOS I/O: 17 (pull-up resistor selectable)

• High-current drive ports: 8

Timer

Timer RJ2

16 bits × 1

Timer mode, pulse output mode (output level inverted every period),

event counter mode, pulse width measurement mode, pulse period

measurement mode

Timer RB2

8 bits × 1 (with 8-bit prescaler) or 16 bits × 1 (selectable)

Timer mode, programmable waveform generation mode (PWM output),

programmable one-shot generation mode, programmable wait one-shot

generation mode

Timer RC

16 bits × 1 (with 4 capture/compare registers)

Timer mode (output compare function, input capture function),

PWM mode (3 outputs), PWM2 mode (1 PWM output)

Serial

interface

UART0

Clock synchronous serial I/O. Also used for asynchronous serial I/O.

A/D converter

• Resolution: 10 bits × 6 channels

• Sample and hold function, sweep mode

Comparator B

2 circuits

R5F2M121ANDD bảng dữ liệu(PDF) 4 Page - Renesas Technology Corp

R5F2M121ANDD bảng dữ liệu(HTML) 4 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

bảng dữ liệu tải về

Link URL