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ADF7242BCPZ bảng dữ liệu(PDF) 64 Page - Analog Devices

tên linh kiện ADF7242BCPZ
Giải thích chi tiết về linh kiện  Low Power IEEE 802.15.4/Proprietary GFSK/FSK Zero-IF 2.4 GHz Transceiver IC
PDF  108 Pages
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nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
Logo AD - Analog Devices

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ADF7242
Rev. 0 | Page 64 of 108
PREAMBLE
SYNC
PACKET
TRCLK_CKO_GP3
tx_mac_delay
RC_TX
DT_GP1
REGISTER gp_cfg,
FIELD gpio_config
1, (4)
IRQ2_TRFS_GP2
RC_PHY_RDY
Figure 97. SPORT Operation in GFSK/FSK TX State
TRCLK_CKO_GP3
rx_mac_delay
RC_RX
DR_GP0
REGISTER gp_cfg,
FIELD gpio_config
1, (4)
2, (5)
3, (6)
IRQ2_TRFS_GP2
TRCLK_CKO_GP3
DR_GP0
IRQ2_TRFS_GP2
TRCLK_CKO_GP3
DR_GP0
IRQ2_TRFS_GP2
PREAMBLE
NOISE
SYNC
PACKET
RC_PHY_RDY
NOISE
Figure 98. Overview of SPORT Modes in GFSK/FSK RX State
Table 33. GFSK/FSK Mode SPORT Interface Configurations
Register gp_cfg,
Bit gpio_config
IRQ2_TRFS_GP2
DR_GP0
DT_GP1
TRCLK_CKO_GP3
1
RX: not used, low
TX: not used, low
RX: data output, changes at
falling edge of data clock
TX: not used
RX: not used
TX: data input, sampled at
rising edge of data clock
RX: data clock
TX: data clock
2
RX: goes high when sync
match has been
detected
RX: data output, changes at
falling edge of data clock
RX: not used
RX: data clock, gated with
detection of preamble
3
RX: goes high when sync
match has been
detected
RX: data output, changes at
falling edge of data clock
RX: not used
RX: data clock, gated with
detection of sync word
4
RX: not used, low
TX: not used, low
RX: data output, changes at
rising edge of data clock
TX: not used
RX: not used
TX: data input, sampled at
falling edge of data clock
RX: data clock
TX: data clock
5
RX: goes high when sync
match has been
detected
RX: data output, changes at
rising edge of data clock
RX: not used
RX: data clock, gated with
detection of preamble
6
RX: goes high when sync
match has been
detected
RX: data output, changes at
rising edge of data clock
RX: not used
RX: data clock, gated with
detection of sync word



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