S5T8809X01-R0B0 datasheet(8/14 Pages) SAMSUNG

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Giải thích chi tiết về linh kiện	PLL FREQUENCY SYNTHESIZER FOR PAGER

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S5T8809

PLL FREQUENCY SYNTHESIZER FOR PAGE

RD = R = 5 ~ 32767 [All value]

CONTROL MODE FOR R-COUNTER REGISTER

Figure 2. Ref. R-Counter Register Programming Timing

LDC

LDC Pin State

Description

Low

LDC function is independent of the other Control Bit

Normal Operation

FRC

R-Counter Value

Description

× R_cnt value (OSCI / 8 × R),

Use 13 bits R-Counter

FRC function is independent of the other Control Bit

R-cnt value (OSC / R),

Use 15 bits R-Counter

TEST1

TEST

LD state

FL state

Description

Normal

• FRC is independent of the other control bit

• Test is internal register control bit

but, Test is external control pin

• Test is related with Test,

when Test = High

→ Test Mode

Normal

Fn (N-CNT)

High state

Fr (N-CNT)

Normal

FRCTEST1

PMC

DATA

R_Counter Divider Data ( RD14 ~ RD0 )

CLK

MSB : 1’st INPUT

positive edge triggered

LSB

MSB

LDC

PMC = 1

→ 13/15 bit R-Counter, LDC, FRC, TEST1

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