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KM416RD8ACD-RK80 bảng dữ liệu(PDF) 36 Page - Samsung semiconductor |
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KM416RD8ACD-RK80 bảng dữ liệu(HTML) 36 Page - Samsung semiconductor |
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36 / 64 page ![]() Page 33 KM416RD8AC(D)/KM418RD8AC(D) Direct RDRAM™ Rev. 1.01 Oct. 1999 . . Figure 29: CNFGB Register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 DEVTYP2..0 = 000 BYT B SVER5..0 = 00000 CORG4..0 = 00100 SPT 1 Control Register: CNFGB Address: 02416 Read-only register. BYT - Byte width. B=1 means the device reads and writes 9-bit memory bytes. B=0 means 8 bits. DEVTYP2..0 - Device type. DEVTYP = 000 means that this device is an RDRAM. SPT - Split-core. SPT=1 means the core is split, SPT=0 means it is not. CORG4..0 - Core organization. This field specifies the number of bank (5 bits), row (9 bits), and column (6 bits) address bits. SVER5..0 - Stepping version. Specifies the mask version number of this device. Figure 30: TEST Register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Read/write register. Reset value of TEST34 is zero (from SIO Reset) This register are used for testing purposes. It must not be read or written after SIO Reset. Control Register: TEST34 Address: 02216 0 0 Figure 31: DEVID Register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 DEVID4..DEVID0 0 0 0 0 0 0 0 0 0 0 Read/write register. Reset value is undefined. Device Identification register. DEVID4..DEVID0 is compared to DR4..DR0, DC4..DC0, and DX4..DX0 fields for all memory read or write transactions. This determines which RDRAM is selected for the memory read or write transaction. Control Register: DEVID Address: 04016 |
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