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Preliminary
5-98
RF9678
Rev A4 010622
5
Procedure for RF9678 Quadrature Modulator/AGC Optimization
1) Configure the test bench as shown in Figure 5.
2) Apply VCC to the part. (VCC=3.0V)
3) Set gain control to maximum. (VGC=2.4V)
4) Apply the LO signal. (760MHz@-5dBm, for an IF out of 380MHz)
5) Apply the I+ and Q+ signals: (Single Ended)
I Signal: 150kHz@ 500 mVp, Phase=0°, 1.3V DC Offset
Q signal: 150kHz@ 500mVp, Phase = 90°, 1.3V DC Offset
6) Set the DC levels at ISIG-and QSIG- input pins to the nominal value (1.3V). The output spectrum should look similar to
Figure 6.
HP6624A or Equiv
DC Power Supply
Output 3
(VGC)
HPE4422B or Equiv
Analog Signal
Generator
(LO)
HP8904 or Equiv
Multifunction Signal
Generator
(Sine, I+ and Q+)
HP66332A or Equiv
DC Power Supply
(VCC, PD)
Rhode and
Schwartz FSIQ7 or
Equiv, Spectrum
Analyzer
9678410
MOD
OUT
LO
Q-
I-
I+
Q+
VGC
VCC
HP6624A or Equiv
DC Power Supply
Outputs 1 and 2
(VREF)
PD
Figure 5. RF9678 Test Setup
A
SWT
2 s
Unit
dBm
1RM
Ref Lvl
15 dBm
Ref Lvl
15 dBm
RF Att
40 dB
32.5 kHz/
Center 380 MHz
Span 325 kHz
EXT
RBW
5 kHz
VBW
50 kHz
-80
-70
-60
-50
-40
-30
-20
-10
0
10
Date:
6.FEB.2001
00:54:00
Figure 6. Unassigned Single Sideband Output
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