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Preliminary
8-78
RF2449
Rev A4 001016
8
Pin
Function
Description
Interface Schematic
1
ENABLE
This pin is used to enable or disable the RF2449. A logic high (> 2.0V)
enables the circuitry. A logic low (<1.0V) disables the circuitry.
2
IP SET
Controls the setting of the LNA current. A logic low (< 1.0V) selects the
internal resistance (49.5k
Ω), resulting in an LNA current of 3.5mA. A
logic high (>2.0V) selects the external resistance at pin 12.
3
IF SEL
Determines which IF port is active. A logic low (< 1.0V) activates IF1
and deactivates IF2. A logic high (> 2.0V) activates IF2 and deactivates
IF1.
4
LNA GAIN
Controls the bypass feature of the LNA. A logic low (< 1.0V) selects the
bypass mode. A logic high (>2.0V) turns on the LNA.
5
MIX GAIN
Controls the bypass feature of the mixer pre-amp. A logic low (< 1.0V)
selects the bypass mode. A logic high (>2.0V) turns on the pre-amp.
6
LNA IN
LNA input pin.
7
VCC1
VCC pin for all circuits except the LO.
8
GND1B
LNA ground pin.
See pin 6.
9
GND1A
Package ground pin.
10
LNA OUT
LNA output pin.
See pin 6.
11
ISET2
An external resistor connected to this pin sets the current of the pre-
amp and the mixer.
12
ISET1
An external resistor connected to this pin sets the current of the LNA
when IP SET is high (see pin 2).
13
GND3B
Ground pin for pre-amp circuit.
14
MIX IN
Mixer pre-amp input pin.
See pin 13.
15
GND3A
Ground pin for the mixer circuits.
16
IF1+
First differential output pin for the first mixer.
ENABLE
IP SET
IF SEL
LNA GAIN
MIX GAIN
MIX GAIN
LNA OUT
GND1B
MIX IN
GND3B
VCC2
IF1-
IF1+
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