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SPMCK16Z4MPV20 bảng dữ liệu(PDF) 281 Page - Freescale Semiconductor, Inc |
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SPMCK16Z4MPV20 bảng dữ liệu(HTML) 281 Page - Freescale Semiconductor, Inc |
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281 / 500 page ![]() M68HC16 Z SERIES GENERAL-PURPOSE TIMER USER’S MANUAL 11-17 Figure 11-6 PWM Block Diagram The PWM unit has two operational modes. Fast mode uses a clocking rate that equals 1/256 of the prescaler output rate; slow mode uses a rate equal to 1/32768 of the pres- caler output rate. The duty cycle ratios of the two PWM channels can be individually controlled by software. The PWMA pin can also output the clock that drives the PWM counter. PWM pins can also be used as output pins. 16/32 PWM BLOCK ZERO DETECTOR 16-BIT COUNTER PWMA REGISTER PWMB REGISTER PWMBUFA REGISTER PWMBUFB REGISTER "A" COMPARATOR "B" COMPARATOR "A" MULTIPLEXER "B" MULTIPLEXER SFB BIT SFA BIT F1A BIT F1B BIT LATCH R S LATCH R S ZERO DETECTOR PWMB PIN PWMA PIN FROM PRESCALER CLOCK [14:0] 16-BIT DATA BUS Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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