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P5DF081 bảng dữ liệu(PDF) 5 Page - NXP Semiconductors |
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P5DF081 bảng dữ liệu(HTML) 5 Page - NXP Semiconductors |
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5 / 36 page ![]() P5DF081_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Objective short data sheet PUBLIC Rev. 1 — 12 August 2010 191710 5 of 36 NXP Semiconductors P5DF081 MIFARE SAM AV2 The maximum specified bit rate in any case is 1.5 Mbit/s. 8.1.3 Card operation procedures All card operation procedures (activation, cold reset, warm reset and deactivation) are fully compliant with Ref. 19, Chapter 5. 8.2 Transmission procedure and communication 8.2.1 Protocol activation sequence All subsequently described operations are compliant with ISO/IEC 7816-3. 8.2.1.1 Answer To Reset (ATR) The MIFARE SAM AV2 offers two modes of operation identified by different ATRs. A negotiable mode where the bit rate has to be adjusted via a PPS request and a specific mode where the MIFARE SAM AV2 switches automatically to F = 128 and D = 32 (highest possible speed) after sending the ATR. Starting with the negotiable mode, the mode of operation is switched after every warm reset. After a cold reset, the card sends the following ATR to the terminal. After this ATR, the card is in the negotiable mode and waits for a PPS request. If a warm reset is issued, the MIFARE SAM AV2 switches the mode of operation, enters the specific mode and sends the following ATR. Table 4. ATR after cold reset Character Value Meaning TS 3Bh initial character; setting up direct convention T0 DFh TA(1), TC(1), TD(1) are present; number of historical characters is 15 TA(1) 18h F = 372; D = 12 TC(1) FFh no extra guard time needed; N = 255 TD(1) 81h TD(2) is present; protocol T = 1 TD(2) F1h TA(3), TB(3), TC(3) and TD(3) are present; protocol T=1 TA(3) FEh Information field size of the card = 254 TB(3) 43h BWT indicator = 4; CWT indicator = 3 TC(3) 00h error detection code = LRC TD(3) 3Fh TA and TB for T = 15 is present; protocol T = 15 (qualifies global interface bytes) TA(after T = 15) 03h clock stop not supported; Class A, Class B TB(after T = 15) 83h Proprietary use of C6 (IO3, reception of serial data from RC222) Historical bytes 4Dh, 49h, 46h, 41h, 52h, 45h, 20h, 50h, 6Ch, 75h, 73h, 20h, 53h, 41h, 4Dh ASCII value of “MIFARE Plus SAM” TCK 3B check character |
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