CDCU2A877ZQLR datasheet(5/16 Pages) TI

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RECOMMENDED OPERATING CONDITIONS

CDCU2A877

SCAS827A – AUGUST 2006 – REVISED JUNE 2007

MIN

NOM

MAX

UNIT

VDDQ

Output supply voltage

1.7

1.8

1.9

AVDD

Supply voltage(1)

VDDQ

VIL

Low-level input voltage(2)

OE, OS,CK,

0.35

× V

DDQ

VIH

High-level input voltage(2)

OE, OS,CK,

0.65

× V

DDQ

IOH

High-level output current (see Figure 2)

–18

IOL

Low-level output current (see Figure 2)

VIX

Input differential-pair cross voltage

(VDDQ/2)-0.15

(VDDQ/2)+0.15

Input voltage level

–0.3

VDDQ+0.3

0.3

VDDQ+0.4

VID

Input differential voltage(2) (see Figure 10)

0.6

VDDQ+0.4

Operating free-air temperature

°C

(1)

The PLL is turned off and bypassed for test purposes when AVDD is grounded. During this test mode, VDDQ remains within the

recommended operating conditions and no timing parameters are ensured.

(2)

VID is the magnitude of the difference between the input level on CK and the input level on CK, see Figure 10 for definition. The CK and

CK VIH and VIL limits define the dc low and high levels for the logic detect state.

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