PC912XDP512F0CFVR datasheet(603/1348 Pages) FREESCALE

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Chapter 16 Interrupt (S12XINTV1)

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor

603

16.3.1.3

Interrupt Request Conﬁguration Address Register (INT_CFADDR)

Read: Anytime

Write: Anytime

Address: 0x0127

76543210

INT_CFADDR[7:4]

0000

Reset

00010000

= Unimplemented or Reserved

Figure 16-5. Interrupt Conﬁguration Address Register (INT_CFADDR)

Table 16-5. INT_CFADDR Field Descriptions

Field

Description

7–4

INT_CFADDR[7:4]

Interrupt Request Conﬁguration Data Register Select Bits — These bits determine which of the 128

conﬁguration data registers are accessible in the 8 register window at INT_CFDATA0–7. The hexadecimal

value written to this register corresponds to the upper nibble of the lower byte of the interrupt vector, i.e.,

writing 0xE0 to this register selects the conﬁguration data register block for the 8 interrupt vector requests

starting with vector (vector base + 0x00E0) to be accessible as INT_CFDATA0–7.

Note: Writing all 0s selects non-existing conﬁguration registers. In this case write accesses to

INT_CFDATA0–7 will be ignored and read accesses will return all 0.

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