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PC912XDP512F0CFVR bảng dữ liệu(PDF) 597 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0CFVR bảng dữ liệu(HTML) 597 Page - Freescale Semiconductor, Inc |
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597 / 1348 page ![]() Chapter 16 Interrupt (S12XINTV1) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 597 • Wait mode In wait mode, the XINT module is frozen. It is however capable of either waking up the CPU if an interrupt occurs or waking up the XGATE if an XGATE request occurs. Please refer to Section 16.5.3, “Wake Up from Stop or Wait Mode” for details. • Stop Mode In stop mode, the XINT module is frozen. It is however capable of either waking up the CPU if an interrupt occurs or waking up the XGATE if an XGATE request occurs. Please refer to Section 16.5.3, “Wake Up from Stop or Wait Mode” for details. • Freeze mode (BDM active) In freeze mode (BDM active), the interrupt vector base register is overridden internally. Please refer to Section 16.3.1.1, “Interrupt Vector Base Register (IVBR)” for details. |
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