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PC912XDP512F0CFVR bảng dữ liệu(PDF) 492 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0CFVR bảng dữ liệu(HTML) 492 Page - Freescale Semiconductor, Inc |
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492 / 1348 page ![]() Chapter 11 Serial Communication Interface (S12SCIV5) MC9S12XDP512 Data Sheet, Rev. 2.21 492 Freescale Semiconductor 11.3.2.9 SCI Data Registers (SCIDRH, SCIDRL) Read: Anytime; reading accesses SCI receive data register Write: Anytime; writing accesses SCI transmit data register; writing to R8 has no effect NOTE If the value of T8 is the same as in the previous transmission, T8 does not have to be rewritten.The same value is transmitted until T8 is rewritten In 8-bit data format, only SCI data register low (SCIDRL) needs to be accessed. When transmitting in 9-bit data format and using 8-bit write instructions, write first to SCI data register high (SCIDRH), then SCIDRL. 76543210 RR8 T8 000000 W Reset 00000000 = Unimplemented or Reserved Figure 11-12. SCI Data Registers (SCIDRH) 76543210 R R7R6R5R4R3R2R1R0 W T7 T6 T5 T4 T3 T2 T1 T0 Reset 00000000 Figure 11-13. SCI Data Registers (SCIDRL) Table 11-12. SCIDRH and SCIDRL Field Descriptions Field Description SCIDRH 7 R8 Received Bit 8 — R8 is the ninth data bit received when the SCI is configured for 9-bit data format (M = 1). SCIDRH 6 T8 Transmit Bit 8 — T8 is the ninth data bit transmitted when the SCI is configured for 9-bit data format (M = 1). SCIDRL 7:0 R[7:0] T[7:0] R7:R0 — Received bits seven through zero for 9-bit or 8-bit data formats T7:T0 — Transmit bits seven through zero for 9-bit or 8-bit formats |
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