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PC912XDP512F0CFVR bảng dữ liệu(PDF) 375 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0CFVR bảng dữ liệu(HTML) 375 Page - Freescale Semiconductor, Inc |
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375 / 1348 page ![]() Chapter 8 Pulse-Width Modulator (S12PWM8B8CV1) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 375 Read: Always read $00 in normal modes Write: Unimplemented in normal modes NOTE Writing to this register when in special modes can alter the PWM functionality. 8.3.2.8 Reserved Register (PWMPRSC) This register is reserved for factory testing of the PWM module and is not available in normal modes. Read: Always read $00 in normal modes Write: Unimplemented in normal modes NOTE Writing to this register when in special modes can alter the PWM functionality. 8.3.2.9 PWM Scale A Register (PWMSCLA) PWMSCLA is the programmable scale value used in scaling clock A to generate clock SA. Clock SA is generated by taking clock A, dividing it by the value in the PWMSCLA register and dividing that by two. Clock SA = Clock A / (2 * PWMSCLA) NOTE When PWMSCLA = $00, PWMSCLA value is considered a full scale value of 256. Clock A is thus divided by 512. Any value written to this register will cause the scale counter to load the new scale value (PWMSCLA). 76543210 R 00000000 W Reset 00000000 = Unimplemented or Reserved Figure 8-9. Reserved Register (PWMTST) 76543210 R 00000000 W Reset 00000000 = Unimplemented or Reserved Figure 8-10. Reserved Register (PWMPRSC) |
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