DC and AC parameters

M34E02, M34E02-F

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Doc ID 10367 Rev 10

Table 14.

AC characteristics

Test conditions specified in Table 10, Table 8 and Table 9

Symbol

Alt.

Parameter

Min.

Max.

Unit

Clock frequency

400

kHz

Clock pulse width high

600

ns

Clock pulse width low

1300

ns

(1)

1.

Sampled only, not 100% tested.

SDA (out) fall time

20

100

ns

(2)

2.

Values recommended by I²C-bus/Fast-Mode specification.

Input signal rise time

20

300

ns

(2)

Input signal fall time

20

300

ns

Data in set up time

100

ns

Data in hold time

0

ns

Data out hold time

200

ns

(3)(4)

3.

To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or

rising edge of SDA.

4.

Clock low to next data valid (access time)

200

900

ns

(5)

5.

For a re-Start condition, or following a Write cycle.

Start condition setup time

600

ns

Start condition hold time

600

ns

600

ns

Time between Stop condition and next Start

condition

1300

ns

Write time

5

ms