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Central Processor Unit (CPU)

Index Register (X)

MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0

General Release Specification

Central Processor Unit (CPU)

3.4 Index Register (X)

The index register is a general-purpose 8-bit register as shown in Figure

3-3. In the indexed addressing modes, the CPU uses the byte in the

index register to determine the conditional address of the operand.

The 8-bit index register can also serve as a temporary data storage

location.

3.5 Stack Pointer (SP)

The stack pointer is a 16-bit register that contains the address of the next

location on the stack as shown in Figure 3-4. During a reset or after the

reset stack pointer (RSP) instruction, the stack pointer initializes to

$00FF. The address in the stack pointer decrements as data is pushed

onto the stack and increments as data is pulled from the stack.

The 10 most significant bits of the stack pointer are permanently fixed at

0000000011, so the stack pointer produces addresses from $00C0 to

$00FF. If subroutines and interrupts use more than 64 stack locations,

the stack pointer wraps around to address $00FF and begins writing

over the previously stored data. A subroutine uses two stack locations;

an interrupt uses five locations.

Bit 7

654321

Bit 0

Read:

Write:

Reset:

Unaffected by Reset

Figure 3-3. Index Register (X)

Bit

Read:

000000011

Write:

Reset:

Figure 3-4. Stack Pointer (SP)

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