CM1235

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CM1235 Application and Guidelines

As a general rule, the CM1235 ESD protection array should be located as close as possible to the point of entry

of expected electrostatic discharges with minimum PCB trace lengths to the ground planes and between the sig-

nal input and the ESD device to minimize stray series inductance.

Figure 8. Application of Positive ESD Pulse Between Input Channel and Ground

Figure 9. Typical PCB Layout

Additional Information

See also California Micro Devices Application Note AP209, “Design Considerations for ESD Protection,” in the

Applications section at www.calmicro.com.