LTC2610IGNPBF datasheet(14/20 Pages) LINER

14 / 20 page

LTC2600/LTC2610/LTC2620

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OPERATION

Power-Down Mode

For power-constrained applications, power-down mode

can be used to reduce the supply current whenever less

than eight outputs are needed. When in power-down, the

buffer ampliﬁers and reference inputs are disabled, and

draw essentially zero current. The DAC outputs are put

into a high impedance state, and the output pins are pas-

sively pulled to ground through individual 90k resistors.

When all eight DACs are powered down, the master bias

generation circuit is also disabled. Input- and DAC-register

contents are not disturbed during power-down.

Any channel or combination of channels can be put into

power-down mode by using command 0100b in combi-

nation with the appropriate DAC address, (n). The 16-bit

data word is ignored. The supply and reference currents

are reduced by approximately 1/8 for each DAC powered

down; the effective resistance at REF (Pin 6) rises accord-

ingly, becoming a high impedance input (typically > 1GΩ)

when all eight DACs are powered down.

Normal operation can be resumed by executing any

command which includes a DAC update, as shown in

Table 1. The selected DAC is powered up as its voltage

output is updated.

There is an initial delay as the DAC powers up before it

begins its usual settling behavior. If less than eight DACs

are in a powered-down state prior to the update command,

the power-up delay is 5μs. If, on the other hand, all eight

DACs are powered down, then the master bias genera-

tion circuit is also disabled and must be restarted. In this

case, the power-up delay is greater: 12μs for VCC = 5V,

30μs for VCC = 3V.

Voltage Outputs

Each of the 8 rail-to-rail ampliﬁers contained in these parts

has guaranteed load regulation when sourcing or sinking

up to 15mA at 5V (7.5mA at 3V).

Load regulation is a measure of the ampliﬁer’s ability to

maintain the rated voltage accuracy over a wide range of

load conditions. The measured change in output voltage

per milliampere of forced load current change is expressed

in LSB/mA.

DC output impedance is equivalent to load regulation, and

may be derived from it by simply calculating a change in

units from LSB/mA to Ohms. The ampliﬁers’ DC output

impedance is 0.025Ω when driving a load well away from

the rails.

When drawing a load current from either rail, the output

voltage headroom with respect to that rail is limited by

the 25Ω typical channel resistance of the output devices;

e.g., when sinking 1mA, the minimum output voltage =

25Ω • 1mA = 25mV. See the graph Headroom at Rails vs

Output Current in the Typical Performance Characteristics

section.

The ampliﬁers are stable driving capacitive loads of up

to 1000pF.

Board Layout

The excellent load regulation and DC crosstalk performance

of these devices is achieved in part by keeping “signal”

and “power” grounds separated internally and by reducing

shared internal resistance to just 0.005Ω.

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