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PIC18F4580-E/ML bảng dữ liệu(PDF) 339 Page - Microchip Technology

tên linh kiện PIC18F4580-E/ML
Giải thích chi tiết về linh kiện  28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
PDF  490 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
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PIC18F4580-E/ML bảng dữ liệu(HTML) 339 Page - Microchip Technology

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© 2009 Microchip Technology Inc.
DS39637D-page 339
PIC18F2480/2580/4480/4580
24.9.1
EXTERNAL CLOCK, INTERNAL
CLOCK AND MEASURABLE JITTER
IN HS-PLL BASED OSCILLATORS
The microcontroller clock frequency generated from a
PLL circuit is subject to a jitter, also defined as Phase
Jitter or Phase Skew. For its PIC18 Enhanced micro-
controllers, Microchip specifies phase jitter (Pjitter) as
being 2% (Gaussian distribution, within 3 standard
deviations, see parameter F13 in Table 28-7) and Total
Jitter (Tjitter) as being 2*Pjitter.
The CAN protocol uses a bit-stuffing technique that
inserts a bit of a given polarity following five bits with the
opposite polarity. This gives a total of 10 bits transmit-
ted without re-synchronization (compensation for jitter
or phase error).
Given the random nature of the jitter error added, it can
be shown that the total error caused by the jitter tends
to cancel itself over time. For a period of 10 bits, it is
necessary to add only two jitter intervals to correct for
jitter-induced error: one interval in the beginning of the
10-bit period and another at the end. The overall effect
is shown in Figure 24-5.
FIGURE 24-5:
EFFECTS OF PHASE JITTER ON THE MICROCONTROLLER CLOCK
AND CAN BIT TIME
Once these considerations are taken into account, it is
possible to show that the relation between the jitter and
the total frequency error can be defined as:
where jitter is expressed in terms of time and NBT is the
Nominal Bit Time.
For example, assume a CAN bit rate of 125 Kb/s, which
gives an NBT of 8 µs. For a 16 MHz clock generated
from a 4x PLL, the jitter at this clock frequency is:
and resultant frequency error is:
Nominal Clock
Clock with Jitter
CAN Bit Time
Phase Skew (Jitter)
CAN Bit Jitter
with Jitter
Δf
Tjitter
10 NBT
×
------------------------
2 Pjitter
×
10 NBT
×
------------------------
=
=
2%
1
16 MHz
-------------------
×
0.02
16
6
×10
-----------------
1.25ns
==
21.25
9
–
×10
()
×
10
8
6
–
×10
()
×
---------------------------------------3.125
5
–
×10
0.0031%
=
=



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