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PIC16F616-E/ML bảng dữ liệu(PDF) 120 Page - Microchip Technology |
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PIC16F616-E/ML bảng dữ liệu(HTML) 120 Page - Microchip Technology |
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120 / 214 page ![]() PIC16F610/616/16HV610/616 DS41288F-page 120 © 2009 Microchip Technology Inc. FIGURE 12-8: INT PIN INTERRUPT TIMING TABLE 12-6: SUMMARY OF REGISTERS ASSOCIATED WITH INTERRUPTS Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Value on all other Resets INTCON GIE PEIE T0IE INTE RAIE T0IF INTF RAIF 0000 0000 0000 0000 IOCA — — IOCA5 IOCA4 IOCA3 IOCA2 IOCA1 IOCA0 --00 0000 --00 0000 PIR1 —ADIF(1) CCP1IF(1) C2IF C1IF —TMR2IF(1) TMR1IF -000 0-00 -000 0-00 PIE1 —ADIE(1) CCP1IE(1) C2IE C1IE —TMR2IE(1) TMR1IE -000 0-00 -000 0-00 Legend: x = unknown, u = unchanged, – = unimplemented read as ‘0’, q = value depends upon condition. Shaded cells are not used by the interrupt module. Note 1: PIC16F616/16HV616 only. Q2 Q1 Q3 Q4 Q2 Q1 Q3 Q4 Q2 Q1 Q3 Q4 Q2 Q1 Q3 Q4 Q2 Q1 Q3 Q4 OSC1 CLKOUT INT pin INTF flag (INTCON reg.) GIE bit (INTCON reg.) INSTRUCTION FLOW PC Instruction Fetched Instruction Executed Interrupt Latency PC PC + 1 PC + 1 0004h 0005h Inst (0004h) Inst (0005h) Dummy Cycle Inst (PC) Inst (PC + 1) Inst (PC – 1) Inst (0004h) Dummy Cycle Inst (PC) — Note 1: INTF flag is sampled here (every Q1). 2: Asynchronous interrupt latency = 3-4 TCY. Synchronous latency = 3 TCY, where TCY = instruction cycle time. Latency is the same whether Inst (PC) is a single cycle or a 2-cycle instruction. 3: CLKOUT is available only in INTOSC and RC Oscillator modes. 4: For minimum width of INT pulse, refer to AC specifications in Section 15.0 “Electrical Specifications”. 5: INTF is enabled to be set any time during the Q4-Q1 cycles. (1) (2) (3) (4) (5) (1) |
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