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PIC18F8490 bảng dữ liệu(PDF) 21 Page - Microchip Technology

tên linh kiện PIC18F8490
Giải thích chi tiết về linh kiện  64/80-Pin Flash Microcontrollers with LCD Driver and nanoWatt Technology
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PIC18F8490 bảng dữ liệu(HTML) 21 Page - Microchip Technology

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© 2007 Microchip Technology Inc.
DS39629C-page 19
PIC18F6390/6490/8390/8490
PORTG is a bidirectional I/O port.
RG0/SEG30
RG0
SEG30
3
I/O
O
ST
Analog
Digital I/O.
SEG30 output for LCD.
RG1/TX2/CK2/SEG29
RG1
TX2
CK2
SEG29
4
I/O
O
I/O
O
ST
—
ST
Analog
Digital I/O.
AUSART2 asynchronous transmit.
AUSART2 synchronous clock (see related RX2/DT2).
SEG29 output for LCD.
RG2/RX2/DT2/SEG28
RG2
RX2
DT2
SEG28
5
I/O
I
I/O
O
ST
ST
ST
Analog
Digital I/O.
AUSART2 asynchronous receive.
AUSART2 synchronous data (see related TX2/CK2).
SEG28 output for LCD.
RG3/SEG27
RG3
SEG27
6
I/O
O
ST
Analog
Digital I/O.
SEG27 output for LCD.
RG4/SEG26
RG4
SEG26
8
I/O
O
ST
Analog
Digital I/O.
SEG26 output for LCD.
RG5
See MCLR/VPP/RG5 pin.
VSS
9, 25, 41, 56
P
—
Ground reference for logic and I/O pins.
VDD
10, 26, 38, 57
P
—
Positive supply for logic and I/O pins.
AVSS
20
P
—
Ground reference for analog modules.
AVDD
19
P
—
Positive supply for analog modules.
TABLE 1-2:
PIC18F6X90 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number Pin
Type
Buffer
Type
Description
TQFP
Legend: TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST
= Schmitt Trigger input with CMOS levels
Analog = Analog input
I
= Input
O
= Output
P
= Power
OD
= Open-Drain (no P diode to VDD)
Note 1: Default assignment for CCP2 when Configuration bit, CCP2MX, is set.
2: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.



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