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RNA51953AFPH0 bảng dữ liệu(PDF) 9 Page - Renesas Technology Corp |
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RNA51953AFPH0 bảng dữ liệu(HTML) 9 Page - Renesas Technology Corp |
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9 / 11 page ![]() RNA51953A, B Preliminary REJ03D0911-0402 Rev.4.02 Page 9 of 10 Apr 01, 2010 0.01 0.1 1 Delay Capacitance Cd ( μF) 10 100 1000 1 10 100 200 1 10 100 Pulse Width ( μs) Characteristic Graph 2 Delay Time vs. Momentary Voltage Decrease Pulse Width (Example data) Characteristic Graph 1 Reaction Time vs. Delay Capacitance (Example data) 1000 10000 10000 1000 100 10 1 0.01 μF Delay Capacitance 0.033 μF 0.1 μF 0.33 μF 1 μF 2.2 μF 3.3 μF Figure 5 Characteristic Graph Setting of Output Load Resistance (RNA51953B) High level output voltage can be set without depending on the power-supply voltage because the output terminal is an open collector type. However, please guard the following notes. 1. Please set it in value (2 V to 17 V) within the range of the power-supply voltage recommendation. Moreover, please never impress the voltage of maximum ratings 18 V or more even momentarily either. 2. Please set output load resistance (pull-up resistance) RL so that the output current (output inflow current IL) at L level may become 4 mA or less. Moreover, please never exceed absolute maximum rating (6 mA). VCC (2 V to 17 V) IL ≤ 4 mA 6 RL Figure 6 Output Load Resistance RL Others 1. Notes when IC is handled are published in our reliability handbook, and please refer it. The reliability handbook can be downloaded from our homepage (following URL). http://www.renesas.com/products/common_info/reliability/reliability_root.jsp 2. Additionally, please inquire of our company when there is an uncertain point on use. |
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