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PIC16F707-E/P bảng dữ liệu(PDF) 81 Page - Microchip Technology |
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PIC16F707-E/P bảng dữ liệu(HTML) 81 Page - Microchip Technology |
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81 / 284 page ![]() 2010 Microchip Technology Inc. Preliminary DS41418A-page 81 PIC16F707/PIC16LF707 FIGURE 9-2: ANALOG-TO-DIGITAL CONVERSION TAD CYCLES 9.1.5 INTERRUPTS The ADC module allows for the ability to generate an interrupt upon completion of an Analog-to-Digital conversion. The ADC interrupt flag is the ADIF bit in the PIR1 register. The ADC Interrupt Enable is the ADIE bit in the PIE1 register. The ADIF bit must be cleared in software. This interrupt can be generated while the device is operating or while in Sleep. If the device is in Sleep, the interrupt will wake-up the device. Upon waking from Sleep, the next instruction following the SLEEP instruc- tion is always executed. If the user is attempting to wake-up from Sleep and resume in-line code execu- tion, the GIE and PEIE bits of the INTCON register must be disabled. If the GIE and PEIE bits of the INTCON register are enabled, execution will switch to the Interrupt Service Routine. Please refer to Section 9.1.5 “Interrupts” for more information. TAD1 TAD2 TAD3 TAD4 TAD5 TAD6 TAD7 TAD8 TAD9 Set GO/DONE bit Holding capacitor is disconnected from analog input (typically 100 ns) b7 b6 b5 b4 b3 b2 b1 b0 Tcy to TAD Conversion Starts ADRES register is loaded, GO/DONE bit is cleared, ADIF bit is set, Holding capacitor is connected to analog input TAD0 Note 1: The ADIF bit is set at the completion of every conversion, regardless of whether or not the ADC interrupt is enabled. 2: The ADC operates during Sleep only when the FRC oscillator is selected. |
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