MCP2200 datasheet(7/34 Pages) MICROCHIP

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 2010 Microchip Technology Inc.

DS22228A-page 7

MCP2200

1.7

EEPROM Module

The EEPROM module is a 256 byte array of nonvolatile

memory. The memory locations are accessed for read/

write operations via USB host commands. Refer to

Section 2.0 “Configuration”

for details on accessing

the EEPROM.

The host should wait for the write cycle to complete and

then verify the write by reading the byte(s).

1.8

RESET/POR

1.8.1

RESET PIN

The RST pin provides a method for triggering an

external Reset of the device. A Reset is generated by

holding the pin low. These devices have a noise filter in

the reset path which detects and ignores small pulses.

1.8.2

POR

A Power-on Reset pulse is generated on-chip

whenever VDD rises above a certain threshold. This

allows the device to start in the initialized state when

VDD is adequate for operation.

To take advantage of the POR circuitry, tie the RST pin

through a resistor (1 kOhm to 10 kOhm) to VDD. This

will eliminate external RC components usually needed

to create a Power-on Reset delay.

When the device starts normal operation (i.e., exits the

Reset

condition),

device

operating

parameters

(voltage, frequency, temperature, etc.) must be met to

ensure operation. If these conditions are not achieved,

the device must be held in Reset until the operating

conditions are met.

1.9

Oscillator

The input clock must be 12 MHz to provide the proper

frequency for the USB module.

USB full-speed is nominally 12 Mb/s. The clock input

accuracy is ±0.25% (2,500 ppm maximum).

FIGURE 1-3:

QUARTZ CRYSTAL

OPERATION

FIGURE 1-4:

CERAMIC RESONATOR

OPERATION

Quartz Crystal

12 MHz

OSC1

OSC2

RS(1)

RF(2)

MCP2200

Note 1:

A series resistor (RS) may be required

for quartz crystals with high drive level.

The value of RF is typically between

 to 10 M.

Example: muRata

CSTCE12M0G15L

OSC1

OSC2

Resonator

12 MHz

MCP2200

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