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MCP2003 bảng dữ liệu(PDF) 14 Page - Microchip Technology |
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MCP2003 bảng dữ liệu(HTML) 14 Page - Microchip Technology |
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14 / 32 page ![]() MCP2003/4 DS22230A-page 14 2010 Microchip Technology Inc. 2.3 AC Specifications AC CHARACTERISTICS VBB = 6.0V to 27.0V; TA = -40°C to +125°C Parameter Sym Min. Typ. Max. Units Test Conditions Bus Interface – Constant Slope Time Parameters Slope rising and falling edges tslope 3.5 — 22.5 µs 7.3V <= VBB <= 18V Propagation Delay of Transmitter ttranspd — — 4.0 µs ttranspd = max (ttranspdr or ttranspdf) Propagation Delay of Receiver trecpd — — 6.0 µs trecpd = max (trecpdr or trecpdf) Symmetry of Propagation Delay of Receiver rising edge w.r.t. falling edge trecsym -2.0 — 2.0 µs trecsym = max (trecpdf – trecpdr) Symmetry of Propagation Delay of Transmitter rising edge w.r.t. falling edge ttrans- sym -2.0 — 2.0 µs ttranssym = max (ttranspdf - ttranspdr) Time to sample of FAULT/ TXE for bus conflict reporting tfault — — 32.5 µs tfault = max (ttranspd + tslope + trecpd) Duty Cycle 1 @20.0 kbit/sec 39.6 — — %tbit Cbus;Rbus conditions: 1 nF; 1 kW | 6.8 nF; 660W | 10 nF; 500W THrec(max) = 0.744 x VBB, THdom(max) = 0.581 x VBB, VBB =7.0V-18V; tbit = 50 µs D1 = tbus_rec(min) / 2 x tbit) Duty Cycle 2 @20.0 kbit/sec — — 58.1 %tbit Cbus;Rbus conditions: 1 nF; 1 kW | 6.8 nF; 660W | 10 nF; 500W THrec(max) = 0.284 x VBB, THdom(max) = 0.422 x VBB, VBB =7.6V-18V; tbit = 50 µs D2 = tbus_rec(max) / 2 x tbit) Duty Cycle 3 @10.4 kbit/sec 41.7 — — %tbit Cbus;Rbus conditions: 1 nF; 1 kW | 6.8 nF; 660W | 10 nF; 500W THrec(max) = 0.778 x VBB, THdom(max) = 0.616 x VBB, VBB =7.0V-18V; tbit = 96 µs D3 = tbus_rec(min) / 2 x tbit) Duty Cycle 4 @10.4 kbit/sec — — 59.0 %tbit Cbus;Rbus conditions: 1 nF; 1 kW | 6.8 nF; 660W | 10 nF; 500W THrec(max) = 0.251 x VBB, THdom(max) = 0.389 x VBB, VBB =7.6V-18V; tbit = 96 µs D4 = tbus_rec(max) / 2 x tbit) Wake-up Timing Bus Activity Debounce time tBDB 5 20 µs Bus debounce time, 10 µs typical Bus Activity to Vren on tBACTVE 35 150 µs After Bus debounce time, 52 µs typical WAKE to Vren on tWAKE 150 µs Chip Select to Vren on tCSOR — 150 µs Vren floating Chip Select to Vren off tCSPD — 80 µs Vren floating |
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