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MCP433X bảng dữ liệu(PDF) 40 Page - Microchip Technology |
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MCP433X bảng dữ liệu(HTML) 40 Page - Microchip Technology |
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40 / 88 page  MCP433X/435X DS22242A-page 40 2010 Microchip Technology Inc. 4.2 Memory Map The device memory supports 16 locations that are 9-bits wide (16x9 bits). This memory space contains only volatile locations (see Table 4-2). 4.2.1 VOLATILE MEMORY (RAM) There are six volatile memory locations. These are: • Volatile Wiper 0 • Volatile Wiper 1 • Volatile Wiper 2 • Volatile Wiper 3 • Terminal Control (TCON0) Register 0 • Terminal Control (TCON)1 Register 1 The volatile memory starts functioning at the RAM retention voltage (VRAM). The POR/BOR Wiper code is shown in Table 4-1. TABLE 4-1: STANDARD SETTINGS Resistance Code Typical RAB Value Default POR Wiper Setting Wiper Code 8-bit 7-bit -502 5.0 k Mid scale 80h 40h -103 10.0 k Mid scale 80h 40h -503 50.0 k Mid scale 80h 40h -104 100.0 k Mid scale 80h 40h TABLE 4-2: MEMORY MAP AND THE SUPPORTED COMMANDS Address Function Memory Type Allowed Commands Disallowed Commands (1) Factory Initialization 00h Volatile Wiper 0 RAM Read, Write, Increment, Decrement — 7-bit 040h 8-bit 080h 01h Volatile Wiper 1 RAM Read, Write, Increment, Decrement — 7-bit 040h 8-bit 080h 02h Reserved — None All — 03h Reserved — None All — 04h Volatile TCON0 Register RAM Read, Write Increment, Decrement 1FFh 05h Reserved — None All — 06h Volatile Wiper 2 RAM Read, Write, Increment, Decrement — 7-bit 040h 8-bit 080h 07h Volatile Wiper 3 RAM Read, Write, Increment, Decrement — 7-bit 040h 8-bit 080h 08h Reserved — None All — 09h Reserved — None All — 0Ah Volatile TCON1 Register RAM Read, Write Increment, Decrement 1FFh 0Bh-0Fh Reserved — None All — Note 1: This command on this address will generate an error condition. To exit the error condition, the user must take the CS pin to the VIH level and then back to the active state (VIL or VIHH). |
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