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TAS5615 bảng dữ liệu(PDF) 3 Page - Texas Instruments |
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TAS5615 bảng dữ liệu(HTML) 3 Page - Texas Instruments |
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3 / 34 page ![]() TAS5615 www.ti.com SLAS595B – JUNE 2009 – REVISED FEBRUARY 2010 MODE SELECTION PINS MODE PINS OUTPUT ANALOG DESCRIPTION INPUT CONFIGURATION M3 M2 M1 0 0 0 Differential 2 × BTL AD mode 0 0 1 — — Reserved 0 1 0 Differential 2 × BTL BD mode Differential 0 1 1 1 × BTL +2 × SE AD mode, BTL differential Single-ended 1 0 0 Single-ended 4 × SE AD mode INPUT_C(1) INPUT_D(1) 1 0 1 Differential 1 × PBTL 0 0 AD mode 1 0 BD mode 1 1 0 Reserved 1 1 1 (1) INPUT_C and _D are used to select between a subset of AD and BD mode operations in PBTL mode (1 = VREG and 0 = AGND). PACKAGE HEAT DISSIPATION RATINGS (1) PARAMETER TAS5615PHD TAS5615DKD RqJC (°C/W) – 2 BTL or 4 SE channels 3.63 2.52 RqJC (°C/W) – 1 BTL or 2 SE channel(s) 5.95 3.22 RqJC (°C/W) – 1 SE channel 9.9 6.9 Pad area (2) 49 mm2 80 mm2 (1) JC is junction-to-case, CH is case-to-heat sink (2) RqH is an important consideration. Assume a 2-mil thickness of typical thermal grease between the pad area and the heat sink and both channels active. The RqCH with this condition is 1.22°C/W for the PHD package and 1.02°C/W for the DKD package. Table 1. ORDERING INFORMATION(1) TA PACKAGE DESCRIPTION 0°C–70°C TAS5615PHD 64-pin HTQFP 0°C–70°C TAS5615DKD 44-pin PSOP3 (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s) :TAS5615 |
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