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PESDXS5UD bảng dữ liệu(PDF) 8 Page - NXP Semiconductors |
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PESDXS5UD bảng dữ liệu(HTML) 8 Page - NXP Semiconductors |
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8 / 13 page ![]() PESDXS5UD_SER_2 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 02 — 7 December 2006 8 of 13 NXP Semiconductors PESDxS5UD series Fivefold ESD protection diode arrays 7. Application information The PESDxS5UD series is designed for the protection of up to five unidirectional data lines from the damage caused by ESD and surge pulses. The PESDxS5UD series may be used on lines where the signal polarities are both, positive and negative with respect to ground. The PESDxS5UD series provides a surge capability of 200 W per line for an 8/20 µs waveform. Circuit board layout and protection device placement Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge transients. The following guidelines are recommended: 1. Place the PESDxS5UD as close to the input terminal or connector as possible. 2. The path length between the PESDxS5UD and the protected line should be minimized. 3. Keep parallel signal paths to a minimum. 4. Avoid running protected conductors in parallel with unprotected conductors. 5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and ground loops. 6. Minimize the length of the transient return path to ground. 7. Avoid using shared transient return paths to a common ground point. 8. Ground planes should be used whenever possible. For multilayer PCBs, use ground vias. Fig 10. Application diagram 6 5 4 1 2 3 006aaa019 PESDxS5UD high-speed data lines unidirectional protection of 5 lines 6 5 4 1 2 3 PESDxS5UD bidirectional protection of 4 lines |
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