PCA9541ADSLASH01 datasheet(12/41 Pages) NXP

12 / 41 page

PCA9541A_3

Product data sheet

Rev. 03 — 16 July 2009

12 of 41

NXP Semiconductors

PCA9541A

2-to-1 I2C-bus master selector with interrupt logic and reset

[1]

MYBUS and NMYBUS is an exclusive-OR type function where:

Equal values (00b or 11b) means that the master reading its Control Register has control of the bus.

Different values (01b or 10b) means that the master reading its Control Register does not have control of

the bus.

[1]

BUSON and NBUSON is an exclusive-OR type function where:

Equal values (00b or 11b) means that the connection between the upstream and the downstream channels

is off.

Different values (01b or 10b) means that the connection between the upstream and the downstream

channels is on.

Switch to the new channel is done when the master initiating the switch request sends a

STOP command to the PCA9541A.

If either master wants to change the connection of the downstream channel, it needs to

write to its Control Register (Reg#01), and then send a STOP command because an

update of the connection to the downstream according to the values in the two internal

Control Registers happens only on a STOP command. Writing to one control register

followed by a STOP condition on the other master's channel will not cause an update to

the downstream connection.

When both masters request a switch to their own channel at the same time, the master

who last wrote to its Control Register before the PCA9541A receives a STOP command

wins the switching sequence. There is no arbitration performed.

The Auto Increment feature (AI = 1) allows to program the PCA9541A in 4 bytes:

Start

111A3A2A1A0 + 0

PCA9541 Address + Write

00010000

Select Reg#00 with AI = 1

Data Reg#00

Interrupt Enable Register data

Data Reg#01

Control Register data

Stop

Table 9.

MYBUS and NMYBUS truth table

As a master reads its Control Register

NMYBUS[1] MYBUS[1]

Slave channel

The master reading this combination has control of the bus.

The master reading this combination does not have control of the bus.

The master reading this combination has control of the bus.

Table 10.

BUSON and NBUSON truth table

NBUSON[1] BUSON[1]

Slave channel

off

10on

01on

off

PCA9541AD/01 bảng dữ liệu(PDF) 12 Page - NXP Semiconductors

PCA9541AD/01 bảng dữ liệu(HTML) 12 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

bảng dữ liệu tải về

Link URL