L6564D datasheet(25/34 Pages) STMICROELECTRONICS

25 / 34 page

L6564

Application information

Doc ID 16202 Rev 1

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Essentially, the circuit artificially increases the ON-time of the power switch with a positive

offset added to the output of the multiplier in the proximity of the line voltage zero-crossings.

This offset is reduced as the instantaneous line voltage increases, so that it becomes

negligible as the line voltage moves toward the top of the sinusoid. Furthermore the offset is

modulated by the voltage on the VFF pin (see “Voltage Feedforward” section) so as to have

little offset at low line, where energy transfer at zero crossings is typically quite good, and a

larger offset at high line where the energy transfer gets worse.

The effect of the circuit is shown in Figure 38, where the key waveforms of a standard TM

PFC controller are compared to those of this chip.

To take maximum benefit from the THD optimizer circuit, the high-frequency filter capacitor

after the bridge rectifier should be minimized, compatibly with EMI filtering needs. A large

capacitance, in fact, introduces a conduction dead-angle of the AC input current in itself -

even with an ideal energy transfer by the PFC pre-regulator - thus reducing the effectiveness

of the optimizer circuit.

6.5

Inductor saturation detection

Boost inductor's hard saturation may be a fatal event for a PFC pre-regulator: the current up-

slope becomes so large (50-100 times steeper, see Figure 39) that during the current sense

propagation delay the current may reach abnormally high values. The voltage drop caused

by this abnormal current on the sense resistor reduces the gate-to-source voltage, so that

the MOSFET may work in the active region and dissipate a huge amount of power, which

leads to a catastrophic failure after few switching cycles.

However, in some applications such as ac-dc adapters, where the PFC pre-regulator is

turned off at light load for energy saving reasons, even a well-designed boost inductor may

occasionally slightly saturate when the PFC stage is restarted because of a larger load

demand. This happens when the restart occurs at an unfavorable line voltage phase, i.e.

when the output voltage is significantly below the rectified peak voltage. As a result, in the

boost inductor the inrush current coming from the bridge rectifier adds up to the switched

current and, furthermore, there is little or no voltage available for demagnetization.

To cope with a saturated inductor, the L6564 is provided with a second comparator on the

current sense pin (CS, pin 4) that stops the IC if the voltage, normally limited within 1.1 V,

exceeds 1.7 V. After that, the IC will be attempted to restart by the internal starter circuitry;

the starter repetition time is twice the nominal value to guarantee lower stress for the

inductor and boost diode. Hence, the system safety will be considerably increased.

Figure 39.

Effect of boost inductor saturation on the MOSFET current and detection method

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