L6563S datasheet(24/42 Pages) STMICROELECTRONICS

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Application information

L6563S

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Doc ID 16116 Rev 3

6.2

Feedback failure protection (FFP)

The OVP function above described handles “normal” over voltage conditions, i.e. those

resulting from an abrupt load/line change or occurring at start-up. In case the overvoltage is

generated by a feedback disconnection, for instance when the upper resistor of the output

divider (R1) fails open, an additional circuitry behind the pin PFC_OK detects the voltage

gap with respect to pin INV. If the voltage gap is greater than 40 mV and the OVP is active,

the FFP is triggered, the gate drive activity is immediately stopped, the device is shut down,

its quiescent consumption is reduced below 180 µA and the condition is latched as long as

the supply voltage of the IC is above the UVLO threshold. At the same time the pin

PWM_LATCH is asserted high. PWM_LATCH is an open source output able to deliver 2.8 V

minimum with 0.25 mA load, intended for tripping a latched shutdown function of the PWM

controller IC in the cascaded dc-dc converter, so that the entire unit is latched off. To restart

the system it is necessary to recycle the input power, so that the Vcc voltage of both the

L6563S goes below 6V and that one of the PWM controller goes below its UVLO threshold.

The pin PFC_OK doubles its function as a not-latched IC disable: a voltage below 0.23V will

shut down the IC, reducing its consumption below 2 mA. In this case both PWM_STOP and

PWM_LATCH keep their high impedance status. To restart the IC simply let the voltage at

the pin go above 0.27 V.

Note that these functions offer a complete protection against not only feedback loop failures

or erroneous settings, but also against a failure of the protection itself. Either resistor of the

PFC_OK divider failing short or open or a PFC_OK pin floating will result in shutting down

the IC and stopping the pre-regulator.

6.3

Voltage feedforward

The power stage gain of PFC pre-regulators varies with the square of the RMS input

voltage. So does the crossover frequency fc of the overall open-loop gain because the gain

has a single pole characteristic. This leads to large trade-offs in the design.

For example, setting the gain of the error amplifier to get fc = 20 Hz @ 264 Vac means

having fc 4 Hz @ 88 Vac, resulting in a sluggish control dynamics. Additionally, the slow

control loop causes large transient current flow during rapid line or load changes that are

limited by the dynamics of the multiplier output. This limit is considered when selecting the

sense resistor to let the full load power pass under minimum line voltage conditions, with

some margin. But a fixed current limit allows excessive power input at high line, whereas a

fixed power limit requires the current limit to vary inversely with the line voltage.

Voltage Feedforward can compensate for the gain variation with the line voltage and allow

minimizing all of the above-mentioned issues. It consists of deriving a voltage proportional to

the input RMS voltage, feeding this voltage into a squarer/divider circuit (1/V2 corrector) and

providing the resulting signal to the multiplier that generates the current reference for the

inner current control loop (see Figure 36).

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