LPC1111 datasheet(36/59 Pages) NXP

36 / 59 page

LPC1111_12_13_14_1

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Product data sheet

Rev. 01 — 16 April 2010

36 of 59

NXP Semiconductors

LPC1111/12/13/14

32-bit ARM Cortex-M0 microcontroller

Conditions: Tamb = 25 °C; active mode entered executing code while(1){} from flash; all

peripherals disabled in the AHBCLKCTRL register (AHBCLKCTRL = 0x1F); all peripheral clocks

disabled; internal pull-up resistors disabled; BOD disabled.

(1) System oscillator and system PLL disabled; IRC enabled.

(2) System oscillator and system PLL enabled; IRC disabled.

Fig 8.

Active mode: Typical supply current IDD versus supply voltage VDD for different

system clock frequencies

Conditions: VDD = 3.3 V; active mode entered executing code while(1){} from flash; all

peripherals disabled in the AHBCLKCTRL register (AHBCLKCTRL = 0x1F); all peripheral clocks

disabled; internal pull-up resistors disabled; BOD disabled.

(1) System oscillator and system PLL disabled; IRC enabled.

(2) System oscillator and system PLL enabled; IRC disabled.

Fig 9.

Active mode: Typical supply current IDD versus temperature for different system

clock frequencies

VDD (V)

1.8

3.6

3.0

2.4

002aaf390

IDD

(mA)

12 MHz(1)

24 MHz(2)

36 MHz(2)

48 MHz(2)

temperature (

°C)

−40

−15

002aaf391

IDD

(mA)

12 MHz(1)

24 MHz(2)

36 MHz(2)

48 MHz(2)

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