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74LVC169DB bảng dữ liệu(PDF) 6 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  Presettable synchronous 4-bit up/down binary counter
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74LVC169_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 8 June 2009
6 of 22
NXP Semiconductors
74LVC169
Presettable synchronous 4-bit up/down binary counter
6.
Functional description
[1]
H = HIGH voltage level steady state
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition
L = LOW voltage level steady state
l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition
qn = Lower case letters indicate state of referenced output prior to the LOW-to-HIGH clock transition
X = don’t care
↑ = LOW-to-HIGH clock transition
* = The TC is LOW when CET is LOW and the counter is at terminal count
Terminal count up is (HHHH) and terminal count down is (LLLL)
Table 3.
Function table[1]
Operating modes
Input
Output
CP
U/D
CEP
CET
PE
Dn
Qn
TC
Parallel load (Dn to Qn)
↑
XXXI
I
L
*
↑
XXXl
h
H
*
Count up (increment)
↑
h
I
I
h
X
count up
*
Count down (decrement)
↑
IIIh
X
count down
*
Hold (do nothing)
↑
Xh
Xh
Xqn
*
↑
XXXh
Xqn
H
Fig 6.
State diagram
001aaa647
0
15
14
13
12
1
2
3
4
5
6
7
11
count down
count up
10
9
8



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