74LVC169 datasheet(5/22 Pages) NXP

tên linh kiện	74LVC169

Giải thích chi tiết về linh kiện	Presettable synchronous 4-bit up/down binary counter

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74LVC169_5

Product data sheet

Rev. 05 — 8 June 2009

5 of 22

NXP Semiconductors

74LVC169

Presettable synchronous 4-bit up/down binary counter

Pinning information

5.1 Pinning

5.2 Pin description

(1) The die substrate is attached to this pad using

conductive die material. It can not be used as a supply

pin or input.

Fig 4.

Pin conﬁguration SO16 and

(T)SSOP16 package

Fig 5.

Pin conﬁguration DHVQFN16 package

74LVC169

U/D

VCC

CEP

CET

GND

001aaa644

001aaa682

74LVC169

CEP

CET

GND(1)

Transparent top view

terminal 1

index area

Table 2.

Pin description

Symbol

Description

U/D

up/down control input

clock input (LOW-to-HIGH, edge-triggered)

D0 to D3

3, 4, 5, 6

data input

CEP

count enable input (active LOW)

GND

ground (0 V)

parallel enable input (active LOW)

CET

count enable carry input (active LOW)

Q0 to Q3

14, 13, 12, 11

ﬂip-ﬂop output

terminal count output (active LOW)

VCC

supply voltage

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