74LVC2GU04_5

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 05 — 27 October 2009

2 of 16

NXP Semiconductors

74LVC2GU04

Dual inverter

4.

Marking

[1]

The pin 1 indicator is located on the lower left corner of the device, below the marking code.

5.

Functional diagram

6.

Pinning information

6.1 Pinning

Table 2.

Marking codes

Type number

Marking[1]

74LVC2GU04GW

YD

74LVC2GU04GV

VU4

74LVC2GU04GM

YD

74LVC2GU04GF

YD

Fig 1.

Logic symbol

Fig 2.

IEC logic symbol

Fig 3.

Logic diagram (one gate)

1A

1Y

1

6

mnb106

2A

2Y

3

4

6

1

1

1

mnb107

4

3

mna636

A

Y

100

Ω

Fig 4.

Pin configuration SOT363

and SOT457

Fig 5.

Pin configuration SOT886

Fig 6.

Pin configuration SOT891

74LVC2GU04

1A

1Y

GND

2A

2Y

001aab680

1

2

3

6

5

4

74LVC2GU04

GND

001aab681

1A

2A

1Y

2Y

Transparent top view

2

3

1

5

4

6

74LVC2GU04

GND

001aag421

1A

2A

1Y

2Y

Transparent top view

2

3

1

5

4

6