74LVC2G126DP datasheet(2/17 Pages) NXP

2 / 17 page

74LVC2G126_8

Product data sheet

Rev. 08 — 5 May 2008

2 of 17

NXP Semiconductors

74LVC2G126

Dual bus buffer/line driver; 3-state

Ordering information

Marking

Functional diagram

Table 1.

Ordering information

Type number

Package

Temperature range

Name

Description

Version

74LVC2G126DP

−40 °C to +125 °C

TSSOP8

plastic thin shrink small outline package; 8 leads;

body width 3 mm; lead length 0.5 mm

SOT505-2

74LVC2G126DC

−40 °C to +125 °C

VSSOP8

plastic very thin shrink small outline package; 8 leads;

body width 2.3 mm

SOT765-1

74LVC2G126GT

−40 °C to +125 °C

XSON8

plastic extremely thin small outline package; no leads;

8 terminals; body 1

× 1.95 × 0.5 mm

SOT833-1

74LVC2G126GD

−40 °C to +125 °C

XSON8U

plastic extremely thin small outline package; no leads;

8 terminals; UTLP based; body 3

× 2 × 0.5 mm

SOT996-2

74LVC2G126GM

−40 °C to +125 °C

XQFN8U

plastic extremely thin quad ﬂat package; no leads;

8 terminals; UTLP based; body 1.6

× 1.6 × 0.5 mm

SOT902-1

Table 2.

Marking codes

Type number

Marking code

74LVC2G126DP

V26

74LVC2G126DC

V26

74LVC2G126GT

V26

74LVC2G126GD

V26

74LVC2G126GM

V26

Fig 1.

Logic symbol

Fig 2.

Logic diagram (one gate)

001aah787

2OE

1OE

mna234

nOE

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