74LVC2G32GD datasheet(2/16 Pages) NXP

2 / 16 page

74LVC2G32_7

Product data sheet

Rev. 07 — 6 June 2008

2 of 16

NXP Semiconductors

74LVC2G32

Dual 2-input OR gate

Ordering information

Marking

Functional diagram

Table 1.

Ordering information

Type number

Package

Temperature range

Name

Description

Version

74LVC2G32DP

−40 °C to +125 °C

TSSOP8

plastic thin shrink small outline package; 8 leads;

body width 3 mm; lead length 0.5 mm

SOT505-2

74LVC2G32DC

−40 °C to +125 °C

VSSOP8

plastic very thin shrink small outline package; 8 leads;

body width 2.3 mm

SOT765-1

74LVC2G32GT

−40 °C to +125 °C

XSON8

plastic extremely thin small outline package; no leads;

8 terminals; body 1

× 1.95 × 0.5 mm

SOT833-1

74LVC2G32GD

−40 °C to +125 °C

XSON8U

plastic extremely thin small outline package; no leads;

8 terminals; UTLP based; body 3

× 2 × 0.5 mm

SOT996-2

74LVC2G32GM

−40 °C to +125 °C

XQFN8U

plastic extremely thin quad ﬂat package; no leads;

8 terminals; UTLP based; body 1.6

× 1.6 × 0.5 mm

SOT902-1

Table 2.

Marking codes

Type number

Marking code

74LVC2G32DP

V32

74LVC2G32DC

V32

74LVC2G32GT

V32

74LVC2G32GD

V32

74LVC2G32GM

V32

Fig 1.

Logic symbol

Fig 2.

IEC logic symbol

001aah791

001aah792

≥ 1

Fig 3.

Logic diagram (one gate)

mna166

74LVC2G32GD bảng dữ liệu(PDF) 2 Page - NXP Semiconductors

74LVC2G32GD bảng dữ liệu(HTML) 2 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

bảng dữ liệu tải về

Link URL