AM1707 datasheet(66/198 Pages) TI

66 / 198 page

EMA_CLK

EMA_BA[1:0]

EMA_CS[0]

EMA_CAS

EMA_RAS

EMA_WE

CLK

EMIFA

SDRAM

2Mx16x4

Bank

EMA_SDCKE

CAS

RAS

CKE

BA[1:0]

LDQM

UDQM

DQ[15:0]

A[11:0]

EMA_A[12:0]

EMA_WE_DQM[0]

EMA_WE_DQM[1]

EMA_D[15:0]

EMA_CS[2]

EMA_CS[3]

EMA_WAIT

EMA_OE

GPIO

(6Pins)

RESET

A[0]

A[12:1]

DQ[15:0]

RESET

A[18:13]

RY/ Y

NOR

FLASH

512Kx16

ALE

CLE

DQ[15:0]

NAND

FLASH

1Gbx16

EMA_A[1]

EMA_A[2]

...

DVDD

RESET

AM1707

SPRS637A – FEBRUARY 2010 – REVISED APRIL 2010

www.ti.com

A likely use case with more than one EMIFA chip select used for NAND flash is illustrated in Figure 6-13.

This figure shows how two multiplane NAND flash devices with two chip selects each would connect to the

EMIFA. In this case if NAND is the boot memory, then the boot image needs to be stored in the NAND

area selected by EMA_CS[3]. Part of the application image could spill over into the NAND regions

selected by other EMIFA chip selects; but would rely on the code stored in the EMA_CS[3] area to

bootload it.

Figure 6-12. Device Connection Diagram: SDRAM, NOR, NAND

Peripheral Information and Electrical Specifications

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