ADF4158

Rev. 0 | Page 22 of 36

STEP REGISTER (R6) MAP

With Register R6 DB[2:0] set to [1, 1, 0], the on-chip step

register is programmed as shown in Figure 28.

Reserved Bits

All reserved bits should be set to 0 for normal operation.

Step SEL

Setting DB23 to 0 chooses Step Word 1. Setting DB23 to 1

chooses Step Word 2.

20-Bit Step Word

DB[22:3] determine the step word. Step word is a number of

steps in the ramp.

DB31

12-BIT DELAY START WORD

RESERVED

CONTROL

BITS

DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9

DB8

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

00

000

0000

00

00

RDF1 RD1 DC1 DSE1 DS12 DS11 DS10 DS9

DS8

DS7

DS6

DS5

C3(1) C2(1) C1(1)

DS12 DS11 .......... DS2 DS1

12-BIT DELAY START WORD

0

0

..........

0

0

0

0

0

..........

0

1

1

0

0

..........

1

0

2

0

0

..........

1

1

3

.

.

.......... .

.

.

.

.

.......... .

.

.

.

.

.......... .

.

.

1

1

..........

0

0

4092

1

1

..........

0

1

4093

1

1

..........

1

0

4094

1

1

..........

1

1

4095

DS4

DS3

DS1

DS2

DSE1

DEL START ENABLE

0

DISABLE

1

ENABLE

RDF1

RAMP DELAY FAST LOCK

0DISABLED

1

ENABLED

DC1

DEL CLK SEL

0PFD CLK

1

PFD × MOD_DIV CLK

RD1

RAMP DELAY

0DISABLED

1

ENABLED

Figure 28. Step Register (R6) Map