iAPX88/188, MCS 196, MCS51 Compatible*

©Xicor, Inc. 1994, 1995, 1996 Patents Pending

* All other brand and product names may be trademarks or

registered trademarks of their respective companies.

7023-2.3 1/29/97 T0/C2/D0 SH

1

Characteristics subject to change without notice

64K

X88064

8192 x 8 Bit

• Block Lock Write Control

—Eight 1K Byte Blocks

- Lockable Independently or in Combination

• Multiplexed Address/Data Bus

—Direct Interface to Popular Microcontrollers

• High Performance CMOS

—Fast Access Times, 60ns and 80 ns

—Low Power

- 30mA Active Maximum

- 150

µA Standby Maximum

• Software Data Protection

• Toggle Bit Polling

—Early End of Write Detection

• Page Mode Write

—Allows up to 32 Bytes to be Written in

One Write Cycle

DESCRIPTION

The X88064 is a high speed byte wide microperipheral

directly connected to industry standard high performance

microprocessors. This peripheral provides two levels of

memory write control, the standard Software Data Pro-

gram (SDP) control and Block Lock.

Block Lock provides a higher level of memory write con-

trol above SDP. This allows the software developer to

partition any or all of the eight 1K byte blocks as In-Circuit

Programmable ROM (ICPROM). Once locked, a block of

memory must first be unlocked before being written. Not

even a write operation using the SDP sequence will

change the contents of a locked block. Since a distinct, 6

byte, software command sequence locks and unlocks

the memory, the software developer has complete con-

trol of the memory contents.

CONTROL

LOGIC

INDIVIDUALLY LOCKABLE

D

E

C

O

D

E

R

L

A

T

C

H

INTERFACE

WR

RD

PSEN

CE

WC

CONTROL

SOFTWARE DATA PROTECT

(SDP)

POWER-ON RESET

WE

OE

BUS TRANSCEIVER

1Kx8 BLOCKS

ALE

BLOCK LOCK

ARRAY

A V A I L A B L E

Application Brief